- Parallel Programming and Optimization Techniques on Modern Architectures including Multi-core Processors and Accelerators.
- Program Analysis and Optimizing Compiler for High-Performance Computing
Quantum Dynamics at Scale: Ultrafast Control of Emergent Functional Materials [pdf]
International Conference on High Performance Computing in Asia-Pacific Region (HPCAsia), 2020 Best Paper Award
RegDem: Increasing GPU Performance via Shared Memory Register Spilling [pdf]
Massively parallel 3D image reconstruction [pdf]
Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis (SC), 2017 ACM Gordon Bell finalists
Pagoda: Fine-grained GPU Resource Virtualization for Narrow Tasks [pdf]
ACM Symposium on Principles and Practice of Parallel Programming (PPoPP), 2017 Best Paper Award Nominee
Formalizing Structured Control Flow Graphs [ppt]
International Workshop on Languages and Compilers for Parallel Computing (LCPC), 2016
Hydra: Extending Shared Address Programming for Accelerator Clusters [pdf] [ppt]
International Workshop on Languages and Compilers for Parallel Computing (LCPC), 2015
Understanding Portability of a High-level Programming Model on Contemporary Heterogeneous Architectures [pdf]
IEEE Micro Magazine, July-August, 2015
HeteroDoop: A MapReduce Programming System for Accelerator Clusters [pdf] [ppt]
ACM International Symposium on High-Performance Parallel and Distributed Computing (HPDC), 2015
Evaluating Performance Portability of OpenACC [pdf] [ppt]
International Workshop on Languages and Compilers for Parallel Computing (LCPC), 2014
Scaling large-data computations on multi-GPU accelerators [pdf] [ppt]
Proceedings of the 27th international ACM conference on International conference on supercomputing (ICS), 2013
Effects of Compiler Optimizations in OpenMP to CUDA Translation [pdf] [ppt]
International Workshop on OpenMP (IWOMP), 2012
Optimizing GPU Programs by Register Demotion [pdf]
Principles and Practice of Parallel Programming (PPoPP), 2019
Pagoda: A Runtime System to Maximize Utilization in Data Parallel Tasks with Limited Parallelism [pdf]
International Conference on Parallel Architectures and Compilation (PACT), 2016
Hydra:Extending Shared Address Programming for Accelerator Clusters [pdf]
PhD in Computer Engineering, Purdue University, West Lafayette, IN (August 2017)
Advisor: Rudolf Eigenmann
MSc in Computer Science, University of California, San Diego (March 2011)
Advisor: Scott Baden
BEng in Computer Engineering, Kasetsart University, Thailand (March 2008)
- Researcher, NSTDA Supercomputer Center (ThaiSC), National Electronics and Computer Technology Center (NECTEC)
(Jan 2019 – present)
- Researcher. Focused on high performance computing, parallel programming, GPU computing, and compiler optimization.
- Design, configure, and manage HPC cluster.
- Researcher, National Electronics and Computer Technology Center (NECTEC)
(Sep 2017 – Dec 2018)
- Researcher in Large Scale Simulation Research Laboratory.
- Advance Short Term Research Opportunity Program, Oak Ridge Associated Universities
(May 2014 – Aug 2014, Aug 2013 – Dec2013)
- Worked on research projects at Future Technology Group at ORNL under supervision of Seyong Lee and Jeffrey Vetter.
- Graduate Assistant, University of California, San Diego
(Mar 2010 - Mar 2011)
- Developed and design website for online-interactive presentation comment
- Intern Software Engineer, Microsoft Corporation, Redmond, WA
(Jun 2010 - Sep 2010)
- Developed tool for Microsoft SQL Server product.
- Co-founder, Software Developer, Extend Interactive Co., Ltd., Bangkok Thailand
(Jul 2008 - Aug 2009)
- Developed and designed interactive software and computer game.
- Past work: A.R.E.S.: Extinction Agenda (PC Game), utility program for assisting single sign-on system, 3D virtual reality shopping mall, and web-based university faculty evaluation service.